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1. general description the 74AVCH8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. it features two data input-output ports (an and bn), a direction control input (dir), a output enable input ( oe) and dual supply pins (v cc(a) and v cc(b) ). both v cc(a) and v cc(b) can be supplied at any voltage between 0.8 v and 3.6 v making the device suitable for translating between any of the low voltage nodes (0.8 v, 1.2 v, 1.5 v, 1.8 v, 2.5 v and 3.3 v). pins an, oe and dir are referenced to v cc(a) and pins bn are referenced to v cc(b) . a high on dir allows transmission from an to bn and a low on dir allows transmission from b to a. the output enable input ( oe) can be used to disable the outputs so the buses are effectively isolated. the device is fully speci?ed for partial power-down applications using i off . the i off circuitry disables the output, preventing any damaging back?ow current through the device when it is powered down. in suspend mode when either v cc(a) or v cc(b) are at gnd level, both a and b outputs are in the high-impedance off-state. the bus-hold circuitry on the powered-up side always stays active. the 74AVCH8T245 has active bus hold circuitry which is provided to hold unused or ?oating data inputs at a valid logic level. this feature eliminates the need for external pull-up or pull-down resistors. 2. features n wide supply voltage range: u v cc(a) : 0.8 v to 3.6 v u v cc(b) : 0.8 v to 3.6 v n complies with jedec standards: u jesd8-12 (0.8 v to 1.3 v) u jesd8-11 (0.9 v to 1.65 v) u jesd8-7 (1.2 v to 1.95 v) u jesd8-5 (1.8 v to 2.7 v) u jesd8-b (2.7 v to 3.6 v) n esd protection: u hbm jesd22-a114e class 3b exceeds 8000 v u mm jesd22-a115-a exceeds 200 v u cdm jesd22-c101c exceeds 1000 v n maximum data rates: u 380 mbit/s ( 3 1.8 v to 3.3 v translation) u 260 mbit/s ( 3 1.1 v to 3.3 v translation) 74AVCH8T245 8-bit dual supply translating transceiver with con?gurable voltage translation; 3-state rev. 02 28 april 2009 product data sheet
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 2 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state u 260 mbit/s ( 3 1.1 v to 2.5 v translation) u 210 mbit/s ( 3 1.1 v to 1.8 v translation) u 150 mbit/s ( 3 1.1 v to 1.5 v translation) u 100 mbit/s ( 3 1.1 v to 1.2 v translation) n suspend mode n bus hold on data inputs n latch-up performance exceeds 100 ma per jesd 78 class ii n inputs accept voltages up to 3.6 v n i off circuitry provides partial power-down mode operation n multiple package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74AVCH8T245pw - 40 c to +125 c tssop24 plastic thin shrink small outline package; 24 leads; body width 4.4 mm sot355-1 74AVCH8T245bq - 40 c to +125 c dhvqfn24 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 24 terminals; body 3.5 5.5 0.85 mm sot815-1 fig 1. logic symbol 001aai472 oe dir v cc(a) v cc(b) 22 2 3 a1 a2 a3 a4 a5 a6 a7 a8 b1 b2 b3 b4 b5 b6 b7 b8 45678910 21 20 19 18 17 16 15 14
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 3 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 5. pinning information 5.1 pinning fig 2. logic diagram (one channel) 001aai473 to other seven channels dir a1 v cc(a) v cc(b) oe b1 (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. fig 3. pin con?guration tssop24 fig 4. pin con?guration dhvqfn24 74AVCH8T245 v cc(a) v cc(b) dir v cc(b) a1 oe a2 b1 a3 b2 a4 b3 a5 b4 a6 b5 a7 b6 a8 b7 gnd b8 gnd gnd 001aai487 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 001aai488 74AVCH8T245 transparent top view b8 a8 gnd b7 a7 b6 a6 b5 a5 b4 a4 b3 a3 b2 a2 b1 a1 oe dir v cc(b) gnd gnd v cc(a) v cc(b) 11 14 10 15 9 16 8 17 7 18 6 19 5 20 4 21 3 22 2 23 12 13 1 24 terminal 1 index area gnd (1)
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 4 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 5.2 pin description [1] all gnd pins must be connected to ground (0 v). 6. functional description [1] h = high voltage level; l = low voltage level; x = dont care; z = high-impedance off-state. [2] the an, dir and oe input circuit is referenced to v cc(a) ; the bn input circuit is referenced to v cc(b) . [3] if at least one of v cc(a) or v cc(b) is at gnd level, the device goes into suspend mode. 7. limiting values table 2. pin description symbol pin description v cc(a) 1 supply voltage a (an, oe and dir inputs are referenced to v cc(a) ) dir 2 direction control a1 to a8 3, 4, 5, 6, 7, 8, 9, 10 data input or output gnd [1] 11 ground (0 v) gnd [1] 12 ground (0 v) gnd [1] 13 ground (0 v) b1 to b8 21, 20, 19, 18, 17, 16, 15, 14 data input or output oe 22 output enable input (active low) v cc(b) 23 supply voltage b (bn inputs are referenced to v cc(b) ) v cc(b) 24 supply voltage b (bn inputs are referenced to v cc(b) ) table 3. function table [1] supply voltage input input/output [3] v cc(a) , v cc(b) oe [2] dir [2] an [2] bn 0.8 v to 3.6 v l l an = bn input 0.8 v to 3.6 v l h input bn = an 0.8 v to 3.6 v h x z z gnd [3] xxzz table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc(a) supply voltage a - 0.5 +4.6 v v cc(b) supply voltage b - 0.5 +4.6 v i ik input clamping current v i <0v - 50 - ma v i input voltage [1] - 0.5 +4.6 v i ok output clamping current v o <0v - 50 - ma v o output voltage active mode [1] [2] [3] - 0.5 v cco + 0.5 v suspend or 3-state mode [1] - 0.5 +4.6 v i o output current v o =0vtov cc - 50 ma i cc supply current i cc(a) or i cc(b) - 100 ma
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 5 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] the minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are obs erved. [2] v cco is the supply voltage associated with the output port. [3] v cco + 0.5 v should not exceed 4.6 v. [4] for tssop24 package: p tot derates linearly at 5.5 mw/k above 60 c. for dhvqfn24 package: p tot derates linearly at 4.5 mw/k above 60 c. 8. recommended operating conditions [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the input port. 9. static characteristics i gnd ground current - 100 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [4] - 500 mw table 4. limiting values continued in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit table 5. recommended operating conditions symbol parameter conditions min max unit v cc(a) supply voltage a 0.8 3.6 v v cc(b) supply voltage b 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode [1] 0v cco v suspend or 3-state mode 0 3.6 v t amb ambient temperature - 40 +125 c d t/ d v input transition rise and fall rate v cci = 0.8 v to 3.6 v [2] - 5 ns/v table 6. typical static characteristics at t amb = 25 c [1] [2] at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v oh high-level output voltage v i = v ih or v il i o = - 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.69 - v v ol low-level output voltage v i = v ih or v il i o = 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.07 - v i i input leakage current dir, oe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - 0.025 0.25 m a i bhl bus hold low current a or b port; v i = 0.42 v; v cc(a) =v cc(b) = 1.2 v [3] -26- m a i bhh bus hold high current a or b port; v i = 0.78 v; v cc(a) =v cc(b) = 1.2 v [4] - - 24 - m a i bhlo bus hold low overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [5] -27- m a i bhho bus hold high overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [6] - - 26 - m a
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 6 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] the bus hold circuit can sink at least the minimum low sustaining current at v il max. i bhl should be measured after lowering v i to gnd and then raising it to v il max. [4] the bus hold circuit can source at least the minimum high sustaining current at v ih min. i bhh should be measured after raising v i to v cc and then lowering it to v ih min. [5] an external driver must source at least i bhlo to switch this node from low to high. [6] an external driver must sink at least i bhho to switch this node from high to low. [7] for i/o ports, the parameter i oz includes the input leakage current. i oz off-state output current a or b port; v o = 0 v or v cco ; v cc(a) =v cc(b) = 3.6 v [7] - 0.5 2.5 m a suspend mode a port; v o =0vorv cco ; v cc(a) = 3.6 v; v cc(b) =0v [7] - 0.5 2.5 m a suspend mode b port; v o =0vorv cco ; v cc(a) = 0 v; v cc(b) = 3.6 v [7] - 0.5 2.5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v - 0.1 1 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v - 0.1 1 m a c i input capacitance dir, oe input; v i = 0 v or 3.3 v; v cc(a) =v cc(b) = 3.3 v - 1.5 - pf c i/o input/output capacitance a and b port; v o = 3.3 v or 0 v; v cc(a) =v cc(b) = 3.3 v - 4.3 - pf table 6. typical static characteristics at t amb = 25 c [1] [2] continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit table 7. static characteristics [1] [2] at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min max min max v ih high-level input voltage data input v cci = 0.8 v 0.70v cci - 0.70v cci -v v cci = 1.1 v to 1.95 v 0.65v cci - 0.65v cci -v v cci = 2.3 v to 2.7 v 1.6 - 1.6 - v v cci = 3.0 v to 3.6 v 2 - 2 - v dir, oe input v cc(a) = 0.8 v 0.70v cc(a) - 0.70v cc(a) -v v cc(a) = 1.1 v to 1.95 v 0.65v cc(a) - 0.65v cc(a) -v v cc(a) = 2.3 v to 2.7 v 1.6 - 1.6 - v v cc(a) = 3.0 v to 3.6 v 2 - 2 - v
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 7 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state v il low-level input voltage data input v cci = 0.8 v - 0.30v cci - 0.30v cci v v cci = 1.1 v to 1.95 v - 0.35v cci - 0.35v cci v v cci = 2.3 v to 2.7 v - 0.7 - 0.7 v v cci = 3.0 v to 3.6 v - 0.8 - 0.8 v dir, oe input v cc(a) = 0.8 v - 0.30v cc(a) - 0.30v cc(a) v v cc(a) = 1.1 v to 1.95 v - 0.35v cc(a) - 0.35v cc(a) v v cc(a) = 2.3 v to 2.7 v - 0.7 - 0.7 v v cc(a) = 3.0 v to 3.6 v - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il i o = - 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v v cco - 0.1 - v cco - 0.1 - v i o = - 3 ma; v cc(a) =v cc(b) = 1.1 v 0.85 - 0.85 - v i o = - 6 ma; v cc(a) =v cc(b) = 1.4 v 1.05 - 1.05 - v i o = - 8 ma; v cc(a) =v cc(b) = 1.65 v 1.2 - 1.2 - v i o = - 9 ma; v cc(a) =v cc(b) = 2.3 v 1.75 - 1.75 - v i o = - 12 ma; v cc(a) =v cc(b) = 3.0 v 2.3 - 2.3 - v v ol low-level output voltage v i = v ih or v il i o = 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v - 0.1 - 0.1 v i o = 3 ma; v cc(a) =v cc(b) = 1.1 v - 0.25 - 0.25 v i o = 6 ma; v cc(a) =v cc(b) = 1.4 v - 0.35 - 0.35 v i o = 8 ma; v cc(a) =v cc(b) = 1.65 v - 0.45 - 0.45 v i o = 9 ma; v cc(a) =v cc(b) = 2.3 v - 0.55 - 0.55 v i o = 12 ma; v cc(a) =v cc(b) = 3.0 v - 0.7 - 0.7 v i i input leakage current dir, oe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - 1- 5 m a i bhl bus hold low current a or b port [3] v i = 0.49 v; v cc(a) =v cc(b) = 1.4 v 15 - 15 - m a v i = 0.58 v; v cc(a) =v cc(b) = 1.65 v 25-25- m a v i = 0.70 v; v cc(a) =v cc(b) = 2.3 v 45 - 45 - m a v i = 0.80 v; v cc(a) =v cc(b) = 3.0 v 100 - 90 - m a table 7. static characteristics continued [1] [2] at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min max min max
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 8 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state i bhh bus hold high current a or b port [4] v i = 0.91 v; v cc(a) =v cc(b) = 1.4 v - 15 - - 15 - m a v i = 1.07 v; v cc(a) =v cc(b) = 1.65 v - 25 - - 25 - m a v i = 1.60 v; v cc(a) =v cc(b) = 2.3 v - 45 - - 45 - m a v i = 2.00 v; v cc(a) =v cc(b) = 3.0 v - 100 - - 100 - m a i bhlo bus hold low overdrive current a or b port [5] v cc(a) = v cc(b) = 1.6 v 125 - 125 - m a v cc(a) = v cc(b) = 1.95 v 200 - 200 - m a v cc(a) = v cc(b) = 2.7 v 300 - 300 - m a v cc(a) = v cc(b) = 3.6 v 500 - 500 - m a i bhho bus hold high overdrive current a or b port [6] v cc(a) = v cc(b) = 1.6 v - 125 - - 125 - m a v cc(a) = v cc(b) = 1.95 v - 200 - - 200 - m a v cc(a) = v cc(b) = 2.7 v - 300 - - 300 - m a v cc(a) = v cc(b) = 3.6 v - 500 - - 500 - m a i oz off-state output current a or b port; v o = 0 v or v cco ; v cc(a) =v cc(b) = 3.6 v [7] - 5- 30 m a suspend mode a port; v o =0vorv cco ; v cc(a) = 3.6 v; v cc(b) =0v [7] - 5- 30 m a suspend mode b port; v o =0vorv cco ; v cc(a) =0 v; v cc(b) = 3.6 v [7] - 5- 30 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v; v cc(b) = 0.8 v to 3.6 v - 5- 30 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v; v cc(a) = 0.8 v to 3.6 v - 5- 30 m a table 7. static characteristics continued [1] [2] at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min max min max
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 9 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] the bus hold circuit can sink at least the minimum low sustaining current at v il max. i bhl should be measured after lowering v i to gnd and then raising it to v il max. [4] the bus hold circuit can source at least the minimum high sustaining current at v ih min. i bhh should be measured after raising v i to v cc and then lowering it to v ih min. [5] an external driver must source at least i bhlo to switch this node from low to high. [6] an external driver must sink at least i bhho to switch this node from high to low. [7] for i/o ports, the parameter i oz includes the input leakage current. i cc supply current a port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -10-55 m a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -8-50 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 8 - 50 m a v cc(a) = 0 v; v cc(b) = 3.6 v - 2- - 12 - m a b port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -10-55 m a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -8-50 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 2- - 12 - m a v cc(a) = 0 v; v cc(b) = 3.6 v - 8 - 50 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = 0 v or v cci ; v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -20-70 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = 0 v or v cci ; v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -16-65 m a table 7. static characteristics continued [1] [2] at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min max min max table 8. typical total supply current (i cc(a) + i cc(b) ) v cc(a) v cc(b) unit 0 v 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v 0 v 0 0.1 0.1 0.1 0.1 0.1 0.1 m a 0.8 v 0.1 0.1 0.1 0.1 0.1 0.3 1.6 m a 1.2 v 0.1 0.1 0.1 0.1 0.1 0.1 0.8 m a 1.5 v 0.1 0.1 0.1 0.1 0.1 0.1 0.4 m a 1.8 v 0.1 0.1 0.1 0.1 0.1 0.1 0.2 m a 2.5 v 0.1 0.3 0.1 0.1 0.1 0.1 0.1 m a 3.3 v 0.1 1.6 0.8 0.4 0.2 0.1 0.1 m a
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 10 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 10. dynamic characteristics [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 9. typical dynamic characteristics at v cc(a) = 0.8 v and t amb = 25 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay an to bn 14.4 7.0 6.2 6.0 5.9 6.0 ns bn to an 14.4 12.4 12.1 11.9 11.8 11.8 ns t dis disable time oe to an 16.2 16.2 16.2 16.2 16.2 16.2 ns oe to bn 17.6 10.0 9.0 9.1 8.7 9.3 ns t en enable time oe to an 21.9 21.9 21.9 21.9 21.9 21.9 ns oe to bn 22.2 11.1 9.8 9.4 9.4 9.6 ns table 10. typical dynamic characteristics at v cc(b) = 0.8 v and t amb = 25 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(a) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay an to bn 14.4 12.4 12.1 11.9 11.8 11.8 ns bn to an 14.4 7.0 6.2 6.0 5.9 6.0 ns t dis disable time oe to an 16.2 5.9 4.4 4.2 3.1 3.5 ns oe to bn 17.6 14.2 13.7 13.6 13.3 13.1 ns t en enable time oe to an 21.9 6.4 4.4 3.5 2.6 2.3 ns oe to bn 22.2 17.7 17.2 17.0 16.8 16.7 ns
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 11 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [2] f i = 10 mhz; v i = gnd to v cc ; t r = t f = 1 ns; c l = 0 pf; r l = w . table 11. typical power dissipation capacitance at v cc(a) = v cc(b) and t amb = 25 c [1] [2] voltages are referenced to gnd (groun d=0v). symbol parameter conditions v cc(a) = v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v c pd power dissipation capacitance a port: (direction a to b); output enabled 0.2 0.2 0.2 0.3 0.4 0.5 pf a port: (direction a to b); output disabled 0.2 0.2 0.2 0.3 0.4 0.5 pf a port: (direction b to a); output enabled 9 9 10 10 11 13 pf a port: (direction b to a); output disabled 0.6 0.6 0.6 0.7 0.7 0.8 pf b port: (direction a to b); output enabled 9 9 10 10 11 13 pf b port: (direction a to b); output disabled 0.6 0.6 0.6 0.7 0.7 0.8 pf b port: (direction b to a); output enabled 0.2 0.2 0.2 0.3 0.4 0.5 pf b port: (direction b to a); output disabled 0.2 0.2 0.2 0.3 0.4 0.5 pf
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 12 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 12. dynamic characteristics for temperature range - 40 c to +85 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 . symbol parameter conditions v cc(b) unit 1.2 v 0.1 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay an to bn 0.5 9.0 0.5 6.7 0.5 5.8 0.5 4.9 0.5 4.8 ns bn to an 0.5 9.0 0.5 8.5 0.5 8.3 0.5 8.0 0.5 7.8 ns t dis disable time oe to an 0.5 11.8 0.5 11.8 0.5 11.8 0.5 11.8 0.5 11.8 ns oe to bn 0.5 12.3 0.5 9.5 0.5 9.4 0.5 8.0 0.5 8.9 ns t en enable time oe to an 1.1 14.4 1.1 14.4 1.1 14.4 1.1 14.4 1.1 14.4 ns oe to bn 1.1 14.2 1.1 10.4 1.1 9.0 1.0 7.7 1.0 7.3 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay an to bn 0.5 8.5 0.5 5.6 0.5 4.7 0.5 4.4 0.5 4.1 ns bn to an 0.5 6.7 0.5 5.6 0.5 5.3 0.5 5.2 0.5 5.0 ns t dis disable time oe to an 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 ns oe to bn 0.5 11.2 0.5 8.4 0.5 7.6 0.5 7.2 0.5 7.8 ns t en enable time oe to an 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 ns oe to bn 1.1 12.8 1.1 8.1 1.1 7.1 1.0 5.6 1.0 5.2 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay an to bn 0.5 8.3 0.5 5.3 0.5 4.5 0.5 3.8 0.5 3.5 ns bn to an 0.5 5.8 0.5 4.7 0.5 4.5 0.5 4.3 0.5 4.1 ns t dis disable time oe to an 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 ns oe to bn 0.5 10.9 0.5 7.8 0.5 6.9 0.5 6.0 0.5 5.8 ns t en enable time oe to an 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 ns oe to bn 1.1 12.4 1.1 8.2 1.0 6.7 0.5 5.1 0.5 4.5 ns v cc(a) = 2.3 v to 2.7 v t pd propagation delay an to bn 0.5 8.0 0.5 5.2 0.5 4.3 0.5 3.3 0.5 2.9 ns bn to an 0.5 4.9 0.5 4.4 0.5 3.8 0.5 3.3 0.5 3.1 ns t dis disable time oe to an 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 ns oe to bn 0.5 10.4 0.5 7.1 0.5 6.3 0.5 5.1 0.5 5.2 ns t en enable time oe to an 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 ns oe to bn 1.1 11.9 1.1 7.9 0.5 6.4 0.5 4.6 0.5 4.0 ns v cc(a) = 3.0 v to 3.6 v t pd propagation delay an to bn 0.5 7.8 0.5 5.0 0.5 4.1 0.5 3.1 0.5 2.7 ns bn to an 0.5 4.8 0.5 4.1 0.5 3.5 0.5 2.9 0.5 2.7 ns t dis disable time oe to an 0.5 4.9 0.5 4.9 0.5 4.9 0.5 4.9 0.5 4.9 ns oe to bn 0.5 10.1 0.5 6.9 0.5 6.0 0.5 4.8 0.5 5.0 ns t en enable time oe to an 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 ns oe to bn 1.1 11.7 1.1 7.8 0.5 6.2 0.5 4.5 0.5 3.9 ns
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 13 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 13. dynamic characteristics for temperature range - 40 c to +125 c [1] voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 ; for wave forms see figure 5 and figure 6 symbol parameter conditions v cc(b) unit 1.2 v 0.1 v 1.5 v 0.1 v 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay an to bn 0.5 9.9 0.5 7.4 0.5 6.4 0.5 5.4 0.5 5.3 ns bn to an 0.5 9.9 0.5 9.4 0.5 9.2 0.5 8.8 0.5 8.6 ns t dis disable time oe to an 0.5 13.0 0.5 13.0 0.5 13.0 0.5 13.0 0.5 13.0 ns oe to bn 0.5 13.6 0.5 10.5 0.5 10.4 0.5 8.8 0.5 9.8 ns t en enable time oe to an 1.1 15.9 1.1 15.9 1.1 15.9 1.1 15.9 1.1 15.9 ns oe to bn 1.1 15.7 1.1 11.5 1.1 9.9 1.0 8.5 1.0 8.1 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay an to bn 0.5 9.4 0.5 6.2 0.5 5.2 0.5 4.9 0.5 4.6 ns bn to an 0.5 7.4 0.5 6.2 0.5 5.9 0.5 5.8 0.5 5.5 ns t dis disable time oe to an 0.5 9.5 0.5 9.5 0.5 9.5 0.5 9.5 0.5 9.5 ns oe to bn 0.5 12.4 0.5 9.3 0.5 8.4 0.5 8.0 0.5 8.6 ns t en enable time oe to an 1.1 9.6 1.1 9.6 1.1 9.6 1.1 9.6 1.1 9.6 ns oe to bn 1.1 14.1 1.1 9.0 1.1 7.9 1.0 6.2 1.0 5.8 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay an to bn 0.5 9.2 0.5 5.9 0.5 5.0 0.5 4.2 0.5 3.9 ns bn to an 0.5 6.4 0.5 5.2 0.5 5.0 0.5 4.8 0.5 4.6 ns t dis disable time oe to an 0.5 7.9 0.5 7.9 0.5 7.9 0.5 7.9 0.5 7.9 ns oe to bn 0.5 12.0 0.5 8.6 0.5 7.6 0.5 6.6 0.5 6.4 ns t en enable time oe to an 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 ns oe to bn 1.1 13.7 1.1 9.1 1.0 7.4 0.5 5.7 0.5 5.0 ns v cc(a) = 2.3 v to 2.7 v t pd propagation delay an to bn 0.5 8.8 0.5 5.8 0.5 4.8 0.5 3.7 0.5 3.2 ns bn to an 0.5 5.4 0.5 4.9 0.5 4.2 0.5 3.7 0.5 3.5 ns t dis disable time oe to an 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 ns oe to bn 0.5 11.5 0.5 7.9 0.5 7.0 0.5 5.7 0.5 5.8 ns t en enable time oe to an 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 ns oe to bn 1.1 13.1 1.1 8.7 0.5 7.1 0.5 5.1 0.5 4.4 ns v cc(a) = 3.0 v to 3.6 v t pd propagation delay an to bn 0.5 8.6 0.5 5.5 0.5 4.6 0.5 3.5 0.5 3.0 ns bn to an 0.5 5.3 0.5 4.6 0.5 3.9 0.5 3.2 0.5 3.0 ns t dis disable time oe to an 0.5 5.4 0.5 5.4 0.5 5.4 0.5 5.4 0.5 5.4 ns oe to bn 0.5 11.2 0.5 7.6 0.5 6.6 0.5 5.3 0.5 5.5 ns t en enable time oe to an 0.5 4.4 0.5 4.4 0.5 4.4 0.5 4.4 0.5 4.4 ns oe to bn 1.1 12.9 1.1 8.6 0.5 6.9 0.5 5.0 0.5 4.3 ns
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 14 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 11. waveforms [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. measurement points are given in t ab le 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 5. the data input (an, bn) to output (bn, an) propagation delay times 001aai475 v m v m v i an, bn input gnd v oh bn, an output v ol t phl t plh measurement points are given in t ab le 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 6. enable and disable times 001aai474 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low-to-off off-to-low output high-to-off off-to-high oe input v ol v oh v cco v i v m gnd gnd t pzl t pzh v m v m table 14. measurement points supply voltage input [1] output [2] v cc(a) , v cc(b) v m v m v x v y 0.8 v to 1.6 v 0.5v cci 0.5v cco v ol + 0.1 v v oh - 0.1 v 1.65 v to 2.7 v 0.5v cci 0.5v cco v ol + 0.15 v v oh - 0.15 v 3.0 v to 3.6 v 0.5v cci 0.5v cco v ol + 0.3 v v oh - 0.3 v
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 15 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] dv/dt 3 1.0 v/ns [3] v cco is the supply voltage associated with the output port. test data is given in t ab le 15 . r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance. v ext = external voltage for measuring switching times. fig 7. load circuit for switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 15. test data supply voltage input load v ext v cc(a) , v cc(b) v i [1] d t/ d v [2] c l r l t plh , t phl t pzh , t phz t pzl , t plz [3] 0.8 v to 1.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2v cco 1.65 v to 2.7 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2v cco 3.0 v to 3.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2v cco
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 16 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 12. typical propagation delay characteristics a. propagation delay (a to b); v cc(a) = 0.8 v b. propagation delay (a to b); v cc(b) = 0.8 v (1) v cc(b) = 0.8 v. (2) v cc(b) = 1.2 v. (3) v cc(b) = 1.5 v. (4) v cc(b) = 1.8 v. (5) v cc(b) = 2.5 v. (6) v cc(b) = 3.3 v. (1) v cc(a) = 0.8 v. (2) v cc(a) = 1.2 v. (3) v cc(a) = 1.5 v. (4) v cc(a) = 1.8 v. (5) v cc(a) = 2.5 v. (6) v cc(a) = 3.3 v. fig 8. typical propagation delay vs load capacitance; t amb = 25 c 001aai476 c l (pf) 060 40 20 12 16 8 20 24 t pd (ns) 4 (1) (2) (3) (4) (5) (6) c l (pf) 060 40 20 001aai477 13 17 21 t pd (ns) 9 (1) (2) (3) (4) (5) (6)
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 17 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state a. low to high propagation delay (a to b); v cc(a) = 1.2 v b. high to low propagation delay (a to b); v cc(a) = 1.2 v c. low to high propagation delay (a to b); v cc(a) = 1.5 v d. high to low propagation delay (a to b); v cc(a) = 1.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 9. typical propagation delay vs load capacitance; t amb = 25 c c l (pf) 060 40 20 001aai478 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai491 3 5 7 t phl (ns) 1 (4) (5) (1) (2) (3) c l (pf) 060 40 20 001aai479 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai480 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 18 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state a. low to high propagation delay (a to b); v cc(a) = 1.8 v b. high to low propagation delay (a to b); v cc(a) = 1.8 v c. low to high propagation delay (a to b); v cc(a) = 2.5 v d. high to low propagation delay (a to b); v cc(a) = 2.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 10. typical propagation delay vs load capacitance; t amb = 25 c c l (pf) 060 40 20 001aai481 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai482 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai483 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai486 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 19 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state a. low to high propagation delay (a to b); v cc(a) = 3.3 v b. high to low propagation delay (a to b); v cc(a) = 3.3 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 11. typical propagation delay vs load capacitance; t amb = 25 c c l (pf) 060 40 20 001aai485 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai484 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 20 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 13. package outline fig 12. package outline sot355-1 (tssop24) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 7.9 7.7 4.5 4.3 0.65 6.6 6.2 0.4 0.3 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot355-1 mo-153 99-12-27 03-02-19 0.25 0.5 0.2 w m b p z e 112 24 13 pin 1 index q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a d y 0 2.5 5 mm scale tssop24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm sot355-1 a max. 1.1
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 21 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state fig 13. package outline sot815-1 (dhvqfn24) references outline version european projection issue date iec jedec jeita note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. sot815-1 - - - - - - - - - 03-04-29 sot815-1 0 2.5 5 mm scale b y y 1 c c a c c b v m w m e 1 e 2 terminal 1 index area terminal 1 index area x unit a (1) max. a 1 bc e e h l e 1 y w v mm 1 0.05 0.00 0.30 0.18 0.5 4.5 e 2 1.5 0.2 2.25 1.95 d h 4.25 3.95 0.05 0.05 y 1 0.1 0.1 dimensions (mm are the original dimensions) 0.5 0.3 d (1) 5.6 5.4 e (1) 3.6 3.4 d e b a e dhvqfn24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm a a 1 c detail x e h l d h 2 23 11 14 13 12 1 24
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 22 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 14. abbreviations 15. revision history table 16. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 17. revision history document id release date data sheet status change notice supersedes 74AVCH8T245_2 20090428 product data sheet - 74AVCH8T245_1 modi?cations: ? section 5 pinning inf or mation : changed: pin names changed in pin description table. 74AVCH8T245_1 20080709 product data sheet - -
74AVCH8T245_2 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 02 28 april 2009 23 of 24 nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 16.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 16.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 16.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74AVCH8T245 8-bit dual supply translating transceiver; 3-state ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 28 april 2009 document identifier: 74AVCH8T245_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 4 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 typical propagation delay characteristics. . . 16 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 20 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 23 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 16.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 16.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 17 contact information. . . . . . . . . . . . . . . . . . . . . 23 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

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